Checked 26 September 2026. From NIC’s CCMT 2025 and 2026 opening/closing score data (Group 1), and IIT Madras, IIT Bombay and IIT (BHU) cut-off documents. “Core-EC” is our programme-name filter; “lowest closing in any round” is our aggregation. 2027 closing scores will differ.
For an EC graduate, the M.Tech route runs through two systems: CCMT, the common counselling for NITs, IIITs and other centrally funded institutes, and each IIT’s own admission (COAP offers). Both admit on GATE scores — CCMT 2026 accepted GATE 2024, 2025 or 2026 — and both publish what it took. This guide collects the official 2025 and 2026 closing scores for the programmes EC candidates target most: VLSI and microelectronics, communication, signal processing and embedded systems.
NIC CCMT data 2026; IIT Madras and IIT Bombay cut-off PDFs.
Where other pages get this wrong
35 marks in GATE 2026 EC converts to a score of about 455 — below IIT Bombay’s minimum of 510 for GN/EWS (about 39.5 marks) and far below IIT Madras EC-stream cut-offs of 718–901 (GEN, with HTTA, 2026).
Commonly published instead: Collegedunia: “Safe scores for IITs: … 32–35 (EE/EC)” (marks).
IIT Bombay minimum GATE cut-off 2026-27; IIT Madras M.Tech 2026 cut-offs; conversion ours from the GATE 2026 EC formula inputs.
CCMT 2026: the top core-EC programmes
| Institute · programme | 2026 OPEN R1 / lowest | 2026 OBC | 2026 SC | 2025 OPEN |
|---|---|---|---|---|
| NIT Surathkal · VLSI Design | 751 / 722 | 737 / 706 | 597 / 552 | 698 / 665 |
| NIT Trichy · VLSI System | 751 / 710 | 714 / 674 | 597 / 556 | 702 / 667 |
| NIT Warangal · VLSI Systems Design | 714 / 666 | 698 / 637 | 556 / 520 | 674 / 616 |
| NIT Rourkela · VLSI Design & Embedded Systems | 702 / 649 | 674 / 625 | 527 / 455 | 651 / 581 |
| NIT Calicut · Microelectronics & VLSI Design | 698 / 645 | 682 / 625 | 532 / 483 | 647 / 584 |
| MNNIT Allahabad · Microelectronics & VLSI Design | 666 / 592 | 649 / 568 | 503 / 410 | 631 / 569 |
| NIT Trichy · Communication Systems | 666 / 609 | 637 / 589 | 499 / 426 | 592 / 530 |
| NIT Rourkela · Semiconductor Devices and Technology | 664 / 560 | 614 / 512 | 455 / 378 | – |
| MNIT Jaipur · VLSI Design | 645 / 560 | 617 / 524 | 479 / 394 | 581 / 518 |
| NIT Surathkal · Communication Engineering and Networks | 617 / 564 | 593 / 532 | 394 / 369 | 543 / 489 |
| NIT Rourkela · Signal & Image Processing | 602 / 549 | 528 / 486 | 442 / 331 | 597 / 503 |
| NIT Warangal · Advanced Communication Systems | 593 / 548 | 568 / 528 | 410 / 386 | 518 / 475 |
| IIST · VLSI and Microsystems | 589 / 520 | 524 / 467 | 422 / 365 | 510 / 436 |
| MNIT Jaipur · Embedded Systems | 585 / 495 | 544 / 463 | 382 / 325 | 526 / 436 |
| NIT Calicut · Signal Processing | 564 / 475 | 532 / 422 | 394 / 313 | 526 / 444 |
| NIT Calicut · Telecommunication | 556 / 479 | 524 / 430 | 378 / 350 | 506 / 397 |
| NIT Kurukshetra · Embedded System Design | 556 / 512 | 532 / 471 | 394 / 361 | 524 / 448 |
NIC CCMT 2025 and 2026 opening/closing GATE scores, Group 1: Round-1 closing / lowest closing in any round (our aggregation). “–” = programme not in that year’s data. A selection — the tool below covers the 30 highest 2026 Round-1 closings, including rows not shown here such as NIT Kurukshetra VLSI Design & Embedded Systems (OPEN 649 / 576).
Which core-EC M.Tech programmes did your score clear in CCMT 2026?
Enter a GATE score (out of 1000) and your category. The check compares it with the lowest CCMT 2026 closing score in any round for the 30 core-EC programmes with the highest Round-1 closing (the full set has 114).
NIC’s CCMT 2026 opening and closing GATE scores, Group 1; “core-EC” (VLSI, microelectronics, communication, signal processing, embedded, RF, semiconductor…) is our name filter and “lowest closing in any round” is our aggregation — later rounds cover only candidates still in the process. A blank means no seat was allotted in that category. 2027 closing scores will differ.
Closing scores rose at nearly every top programme from 2025 to 2026 — NIT Surathkal VLSI’s Round-1 close went from 698 to 751, NIT Trichy Communication Systems from 592 to 666 — which fits the 17.5% rise in EC candidates appearing, from 81,475 to 95,752 (our arithmetic and reading). VLSI and microelectronics now head the table; a Round-1 VLSI seat at the top NITs needed about 710–750, which in GATE 2026 terms is roughly 56–60 raw marks (our conversion). The later rounds matter: the lowest closing is often 30–100 points below Round 1, because candidates upgrade and seats cascade.
| GATE 2026 EC | Figure |
|---|---|
| Appeared | 95,752 (81,475 in 2025) |
| Score 700–800 band | Ranks 163–653 |
| Score 800–900 band | Ranks 34–149 |
| Score 900–1000 band | Ranks 1–33 |
| Score 710 / 750 / 450 in marks (our conversion) | about 56.0 / 59.3 / 34.6 |
GATE 2025 and 2026 statistical reports (appeared, score bands); conversions ours from the 2026 formula inputs (qualifying mark 26.4, topper average 71.59).
Across all core-EC programmes
| 2025 | Category | 2026 programmes · min / median / max (lowest close) |
|---|---|---|
| 95 · 350 / 370 / 667 | OPEN | 114 · 350 / 397.5 / 722 |
| 84 · 320 / 354 / 655 | EWS | 102 · 315 / 369 / 678 |
| 93 · 314 / 335 / 623 | OBC-NCL | 114 · 298 / 345.5 / 706 |
| 94 · 210 / 276 / 491 | SC | 113 · 193 / 288 / 556 |
| 75 · 215 / 260 / 397 | ST | 79 · 170 / 260 / 536 |
Our aggregation of NIC’s CCMT data: 289 programme-groups admitted GATE EC in 2026; our core-EC name filter (VLSI, microelectronics, communication, signal, embedded, RF/microwave, telecom, semiconductor, photonics; power, electrical, data-science, computer and instrumentation excluded) leaves 116, of which 114 had an OPEN close. OPEN Round-1 closing: 2026 median 488 (max 751); 2025 median 452 (max 702).
The median is the useful number: in 2026 an OPEN score of about 400 cleared the last round of half the core-EC programmes, and about 450 — roughly 35 marks in GATE 2026 (our conversion) — cleared more. That is well within reach of a qualified candidate; the top VLSI seats are not.
IIT Madras: EC-stream cut-offs
| Programme (2026 seats with / without HTTA) | Papers | 2026 GEN / EWS / OBC / SC / ST (HTTA) | 2025 (HTTA) |
|---|---|---|---|
| EE1 Communications & Signal Processing (20/4) | EC | 735 / 690 / 714 / 516 / 495 | 690 / 592 / 647 / 561 / 346 |
| EE3 Microelectronics & VLSI Design (11/6) | EC | 871 / 808 / 808 / 682 / 540 | 881 / 788 / 792 / 760 / 651 |
| EE4 Electronic System Design & Instrumentation (8/2) | BM, EC, EE, IN | 851 / 742 / 755 / 687 / 480 | 829 / 678 / 720 / 656 / 433 |
| EE5 RF and Photonics (8/4) | EC, EE, IN, PH | 723 / 686 / 653 / 483 / 392 | 665 / 561 / 590 / 459 / 311 |
| EE6 Integrated Circuits & Systems (13/6) | EC, EE, IN | 901 / 844 / 852 / 779 / 726 | 944 / 854 / 862 / 686 / 449 |
| EE7 Control & Optimization (8/2) | DA, EC, EE, IN | 718 / 614 / 648 / 492 / 414 | 772 / 547 / 627 / 452 / 358 |
IIT Madras M.Tech 2026 and 2025 GATE cut-off scores (Y = with Half-Time Teaching Assistantship) and 2026 Table-1 (streams, seats). Without-HTTA 2026 GEN: EE1 698, EE3 848, EE6 881. “For non-conforming UG subject/GATE paper, the admitting department reserves the rights to implement internal criteria.”
From the table above.
IIT Bombay and IIT (BHU)
| Institute | What was published |
|---|---|
| IIT Bombay, Electrical Engineering (EE1 Communication, EE2 Control & Computing, EE3 Power Electronics & Power Systems, EE5 Electronic Systems, EE6 ICs & Systems, EE7 Solid State Devices) | Minimum GATE score to be considered (TA categories), same in 2025-26 and 2026-27: GN/EWS 510 · OBC-NC 459 · SC/ST 340 — a floor for shortlisting, not a closing score |
| IIT (BHU) Varanasi, Electronics Engineering, COAP 2025 only — not a 2026 figure (GEN / OBC-NCL / SC / ST / EWS) | Microelectronics 655 / 616 / 495 / 346 / 620 · Digital Systems 612 / 596 / 420 / 315 / 600 · VLSI Architecture & Chip Design 604 / 642 / 534 / 377 / 616 (OBC above GEN, as printed) |
IIT Bombay minimum GATE cut-off documents 2025-26 and 2026-27; IIT (BHU) COAP-2025 GATE cut-off. IIT Delhi, Kharagpur, Kanpur, Roorkee and Guwahati EC-stream cut-offs were not collected for this guide.
A 510 at IIT Bombay is a door, not a seat: it means you will be considered, and the department then shortlists. IIT Madras publishes the actual closing scores, and those show the spread — from about 720 for control and RF to about 900 for integrated circuits. For planning: IIT Madras’s VLSI stream closed at 871 (the 800–900 band, ranks 34–149 in GATE 2026) and its IC stream at 901 (the 900–1000 band, ranks 1–33), while the top NIT VLSI Round-1 seats sat in the 700–800 band, ranks 163–653; most other core-EC programmes fall below that.
Practise it, don't just read it
A 50-point swing in GATE score is roughly four to five marks in the paper. The GATE EC quizzes target the core subjects where those marks are won.
The ProSyllabus GATE EC library has topic quizzes on diode circuits and clippers, Boolean algebra and Karnaugh maps, transfer functions and block diagrams, signals and systems, Maxwell’s equations, and antennas and propagation — the first quiz is free.
What GATE score is needed for NIT Trichy VLSI?
In CCMT 2026 the OPEN Round-1 close was 751, and the lowest close in any round 710.
What was the NIT Surathkal VLSI cut-off in 2026?
OPEN Round-1 751, lowest close 722 (2025: 698 / 665).
What is the IIT Madras M.Tech VLSI cut-off?
871 (GEN, with HTTA) in 2026 for EE3 Microelectronics & VLSI; 881 in 2025.
What is the IIT Bombay M.Tech minimum GATE score for EC?
510 for GN/EWS, 459 OBC-NC, 340 SC/ST — a minimum, not a closing score.
Did CCMT cut-offs rise in 2026?
Yes, at nearly every top core-EC programme.
Which GATE years did CCMT 2026 accept?
GATE 2024, 2025 or 2026.
What score gets an NIT M.Tech in communication?
NIT Trichy Communication Systems closed at 666 (Round 1) and 609 (lowest) for OPEN in 2026.
More in this series
- GATE EC 2027 syllabus changes: FIR/IIR, PID, Miller and more
- GATE EC marks vs score vs rank, 2023–2026
- GATE EC previous papers 2024–2026, counted question by question
- PSUs through GATE EC: POWERGRID, NTPC, NPCIL and their cut-offs
- GATE EC vs EE vs IN (and RA): which paper to write in 2027
- GATE EC notice board — official updates
Sources
- official — NIC — CCMT 2026 round-wise opening and closing GATE scores
- official — NIC — CCMT 2025 round-wise opening and closing GATE scores
- official — CCMT 2026 — information brochure and schedule
- official — IIT Madras — M.Tech 2026 GATE cut-off scores (PDF)
- official — IIT Madras — M.Tech 2025 GATE cut-off scores (PDF)
- official — IIT Madras — M.Tech 2026 Table-1 (programmes, seats)
- official — IIT Bombay — Minimum GATE cut-off 2026-27 (PDF)
- official — GATE 2026 Statistical and Performance Report (IIT Guwahati, PDF)
- reported — Collegedunia — GATE cutoff 2026 (reported; see corrections)
official = a document published by the conducting body. reported = a news or coaching site we could not check against an original. Where sources disagree this page says so rather than picking one.
